
Connect external USB serial bridge cable with 3.3V logic levels for terminal.

GPIO header JP1 pin 10 to cable TXD
GPIO header JP1 pin 12 to cable GND
GPIO header JP1 pin 14 to cable RXD

Communication is 115200 baud 8N1.

Typing "reset" at the Forth prompt or pressing both buttons at once will trigger reconfiguration of the FPGA.

