
compiletoflash

$40010800 constant PORTA_Base
$40010C00 constant PORTB_Base
$40011000 constant PORTC_Base
$40011400 constant PORTD_Base
$40011800 constant PORTE_Base

  PORTA_BASE $00 + constant PORTA_CRL  \ Reset $44444444 Control Register for pins  0 to 7
  PORTA_BASE $04 + constant PORTA_CRH  \ Reset $44444444 Control Register for pins 15 to 8
  PORTA_BASE $08 + constant PORTA_IDR  \ RO              Input Data Register
  PORTA_BASE $0C + constant PORTA_ODR  \ Reset 0         Output Data Register
  PORTA_BASE $10 + constant PORTA_BSRR \ WO              Bit set/reset register 31:16 Reset 15:0 Set
  PORTA_BASE $14 + constant PORTA_BRR  \ WO              Bit reset register 15:0 Reset
           \ $18 + constant PORTA_LCKR \ ... is Lock Register, unused here

  PORTB_BASE $00 + constant PORTB_CRL  \ Reset $44444444 Control Register for pins  0 to 7
  PORTB_BASE $04 + constant PORTB_CRH  \ Reset $44444444 Control Register for pins 15 to 8
  PORTB_BASE $08 + constant PORTB_IDR  \ RO              Input Data Register
  PORTB_BASE $0C + constant PORTB_ODR  \ Reset 0         Output Data Register
  PORTB_BASE $10 + constant PORTB_BSRR \ WO              Bit set/reset register 31:16 Reset 15:0 Set
  PORTB_BASE $14 + constant PORTB_BRR  \ WO              Bit reset register 15:0 Reset
           \ $18 + constant PORTB_LCKR \ ... is Lock Register, unused here

  PORTC_BASE $00 + constant PORTC_CRL  \ Reset $44444444 Control Register for pins  0 to 7
  PORTC_BASE $04 + constant PORTC_CRH  \ Reset $44444444 Control Register for pins 15 to 8
  PORTC_BASE $08 + constant PORTC_IDR  \ RO              Input Data Register
  PORTC_BASE $0C + constant PORTC_ODR  \ Reset 0         Output Data Register
  PORTC_BASE $10 + constant PORTC_BSRR \ WO              Bit set/reset register 31:16 Reset 15:0 Set
  PORTC_BASE $14 + constant PORTC_BRR  \ WO              Bit reset register 15:0 Reset
           \ $18 + constant PORTC_LCKR \ ... is Lock Register, unused here

  PORTD_BASE $00 + constant PORTD_CRL  \ Reset $44444444 Control Register for pins  0 to 7
  PORTD_BASE $04 + constant PORTD_CRH  \ Reset $44444444 Control Register for pins 15 to 8
  PORTD_BASE $08 + constant PORTD_IDR  \ RO              Input Data Register
  PORTD_BASE $0C + constant PORTD_ODR  \ Reset 0         Output Data Register
  PORTD_BASE $10 + constant PORTD_BSRR \ WO              Bit set/reset register 31:16 Reset 15:0 Set
  PORTD_BASE $14 + constant PORTD_BRR  \ WO              Bit reset register 15:0 Reset
           \ $18 + constant PORTD_LCKR \ ... is Lock Register, unused here

  PORTE_BASE $00 + constant PORTE_CRL  \ Reset $44444444 Control Register for pins  0 to 7
  PORTE_BASE $04 + constant PORTE_CRH  \ Reset $44444444 Control Register for pins 15 to 8
  PORTE_BASE $08 + constant PORTE_IDR  \ RO              Input Data Register
  PORTE_BASE $0C + constant PORTE_ODR  \ Reset 0         Output Data Register
  PORTE_BASE $10 + constant PORTE_BSRR \ WO              Bit set/reset register 31:16 Reset 15:0 Set
  PORTE_BASE $14 + constant PORTE_BRR  \ WO              Bit reset register 15:0 Reset
           \ $18 + constant PORTE_LCKR \ ... is Lock Register, unused here

\ Values for CRL/CRH-Registers:

\ 0:  Analog Input
\ 1:  Output Push/Pull, 10 MHz
\ 2:  Output Push/Pull,  2 MHz
\ 3:  Output Push/Pull, 50 MHz

\ 4:  Floating Input (Reset state)
\ 5:  Open-Drain Output, 10 MHz
\ 6:  Open-Drain Output,  2 MHz
\ 7:  Open-Drain Output, 50 MHz

\ 8:  Input with pull-up / pull-down
\ 9:  Alternate Function, Push/Pull, 10 MHz
\ A:  Alternate Function, Push/Pull,  2 MHz
\ B:  Alternate Function, Push/Pull, 50 MHz

\ C:  Reserved
\ D:  Alternate Function, Open-Drain, 10 MHz
\ E:  Alternate Function, Open-Drain,  2 MHz
\ F:  Alternate Function, Open-Drain, 50 MHz

: delay-ticks ( ticks -- )
  cycles ( ticks start )
  begin
    pause
    2dup ( ticks start ticks start )
    cycles ( ticks start ticks start current )
    swap - ( ticks start ticks elapsed )
    u<=
  until
  2drop
;

: Flamingo cr
."      _" cr
."     ^-)" cr
."      (.._          .._" cr
."       \`\\        (\`\\        (" cr
."        |>         ) |>        |)" cr
." ______/|________ (7 |` ______\|/_______a:f" cr
;

: init
  cr
  Flamingo
  cr
  ." Have a nice day !" cr
;

\ Cornerstone for 1 kb Flash pages

: cornerstone ( Name ) ( -- )
  <builds begin here $3FF and while 0 , repeat
  does>   begin dup  $3FF and while 4 + repeat
          eraseflashfrom
;

cornerstone eraseflash
