03.03.2018, Matthias Koch, Mecrisp-Quintus 0.1 experimental:

  I am very happy to announce Mecrisp-Quintus !
  This is the very first beginning, expect monsters inside.

10.03.2018, Matthias Koch, Mecrisp-Quintus 0.2 experimental:

  New target: LM4F120 with Mamihlapinatapai, an instruction set emulator running on ARM Cortex M3/M4.

15.03.2018, Matthias Koch, Mecrisp-Quintus 0.3 experimental:

  - Bugfix for du>
  - Contribution by Andrew Palm:
      - Fixpoint math library
      - Sunset and sunrise calculations

21.04.2018, Matthias Koch, Mecrisp-Quintus 0.4 experimental:

  - New target: HiFive1
  - Fixpoint math library now included for default along with disassembler

15.05.2018, Matthias Koch, Mecrisp-Quintus 0.5 experimental:

  - Bugfixes for redefinitions in flash memory and compile-only flags
  - Smaller push and pop sequences for multiple registers

25.06.2018, Matthias Koch, Mecrisp-Quintus 0.6 experimental:

  - Bugfix for 2r> and evaluate
  - Added arcsin and arccos to cordic library

09.07.2018, Matthias Koch, Mecrisp-Quintus 0.7 experimental:

  - Constants can be included into opcodes of many common primitives
  - Much more inlining
  - Increased reserved core size from 24 kb to 32 kb
  - Added arcsin and arccos to cordic library

24.09.2018, Matthias Koch, Mecrisp-Quintus 0.8 experimental:

  - Fixed flaw in bit@ hbit@ cbit@
  - Fixed flaw in depth and rdepth
  - New target: TM4C1294 with Mamihlapinatapai

20.10.2018, Matthias Koch, Mecrisp-Quintus 0.9 experimental:

  - MIPS M4K architecture added:
    * PIC32MX570F512L
    * Linux
  - MIPS disassembler
  - Fixed many small flaws
  - Doubled size of stacks

14.11.2018, Matthias Koch, Mecrisp-Quintus 0.10 experimental:

  - Fixed bugs in move, recurse and hook-quit

04.02.2019, Matthias Koch, Mecrisp-Quintus 0.11 experimental:

  - I am happy to announce "acrobatics": Experimental register allocator for Mecrisp-Quintus
  - Fixed serious bug in find
  - Enhanced registerliteral, and inline,
  - Improved performance in d+ d- degate ud/mod du< du>

14.02.2019, Matthias Koch, Mecrisp-Quintus 0.12 experimental:

  - Bugfix for targets with erased flash containing zero
  - Improved acrobatics

14.02.2019, Matthias Koch, Mecrisp-Quintus 0.13 experimental:

  - Acrobatics now also available for MIPS
  - Removed divide by zero trap on MIPS which was automatically generated by assembler

18.02.2019, Matthias Koch, Mecrisp-Quintus 0.14 experimental:

  - Added to core: slt sltu hook-find
  - Improved acrobatics

27.02.2019, Matthias Koch, Mecrisp-Quintus 0.15 experimental:

  - Preview for new target: Open-Isa Vega Board with RV32M1
  - Found and included simpler flashing method for HiFive1
  - Improved acrobatics

28.02.2019, Matthias Koch, Mecrisp-Quintus 0.16 experimental:

  - New target: RISC-V Linux

02.03.2019, Matthias Koch, Mecrisp-Quintus 0.17 experimental:

  - Added proper terminal, interrupts and flash write support for Vega
  - Separate toolchain package to reduce size of subsequent releases

27.03.2019, Matthias Koch, Mecrisp-Quintus 0.18 experimental:

  - Ledcomm example for Vega, using timer interrupt
  - Fixed flaws in Acrobatics compiler
  - Acrobatics binary for Vega, ready for interrupt usage
  - Fixed number base in disassembler for RISC-V

09.04.2019, Matthias Koch, Mecrisp-Quintus 0.19 experimental:

  - Experimental interrupt framework for MIPS

26.05.2019, Matthias Koch, Mecrisp-Quintus 0.20 experimental:

  - Fixed flaw in does> for MIPS
  - Fixed bugs in disassembler for MIPS
  - Added a MIPS port of quintusemu

  - Contribution by Baldwin Robertson:
      New target: PIC32MX270F256B

12.06.2019, Matthias Koch, Mecrisp-Quintus 0.21 experimental:

  - Added interrupt support for HiFive1

21.07.2019, Matthias Koch, Mecrisp-Quintus 0.22 experimental:

  - Fixed mulhsu sign handling in Mamihlapinatapai
  - Fixed auipc handling in disassembler-rv32im
  - Added RISC-V assembler
  - HiFive1 now has both mtime64 and cycles64

  - Contribution by Paul Dickson:
      Port for HiFive1 revision B

06.09.2019, Matthias Koch, Mecrisp-Quintus 0.23 experimental:

  - Changed HX8K Picosoc target to nextpnr and updated picorv32 from upstream
  - New target: Icebreaker with UP5K FPGA

23.09.2019, Matthias Koch, Mecrisp-Quintus 0.24 experimental:

  - Interrupts on Icebreaker

31.10.2019, Matthias Koch, Mecrisp-Quintus 0.25 experimental:

  - New target: Sipeed Longan Nano with GD32VF103CB

04.12.2019, Matthias Koch, Mecrisp-Quintus 0.26 highly experimental:

  - A very deep change: Added support for compressed instruction set RV32IMC

    For smaller opcodes, register map was changed in all source files on all targets
    as compressed instructions are available mostly for x8 to x15:

    x3 --> x8   TOS
    x4 --> x9   Data stack pointer
    x5 --> x14  Unsaved temporary 1
    x6 --> x15  Unsaved temporary 2

    x8 --> x3   Loop index
    x9 --> x4   Loop limit

    Many changes and improvements everywhere, which surely introduced new bugs:
    If something crashes on 0.26 and works fine on 0.25, please report.

  - Added linux-rv32imc target
  - Switched HX8K and GD32VF103 to IMC Forth core
  - Added FIFO to the receive side of the Icebreaker UART
  - HX8K target is now very similiar to Icebreaker
  - Fixed a few elements left on the stack in fixpt-math-lib-tests.fs
  - Updated toolchain calls to use riscv64-linux-gnu-* available as
    package "binutils-riscv64-linux-gnu" in Debian 10

  - Contribution by Terry Porter:
      Examples for GD32VF103CB

28.12.2019, Matthias Koch, Mecrisp-Quintus 0.27 experimental:

  - Added Forth examples for SDHC-Card, ADC and DAC in GD32VF103CB
  - Fixed available amount of RAM in GD32VF103CB
  - Fixed many small flaws in core while cleaning up assembler code

  - Shrunk reserved core binary sizes for RISC-V:
    * RV32IM:  24 kb
    * RV32IMC: 18 kb

21.03.2020, Matthias Koch, Mecrisp-Quintus 0.27a experimental:

  - Fixed Bresenham ellipse graphics routine
  - Added multiplydivide-sw.s for RV32I

  - Contribution by Martin Bitter:
      A collection of libraries, drivers and demos for GD32VF103CB

28.06.2020, Matthias Koch, Mecrisp-Quintus 0.28 experimental:

  - Added align and aligned to all targets
  - Added CSR tools
  - Added support for system instructions to RISC-V disassemblers
  - Added graphics primitives for circles in Forth
  - Fixed bug in SD-Card driver

  - Contribution by Manfred Mahlow:
      VIS extension

  - Contribution by Wolfgang Strauss:
      CSRs for GD32VF103

05.07.2020, Matthias Koch, Mecrisp-Quintus 0.29 experimental:

  - Added support for c.lui in core
  - Added support for RV32IMC in Acrobatics compiler and fixed bugs
  - Fixed bug in quintusemu variants using compressed instructions
  - Fixed bug in disassembler-rv32imc
  - Fixed bug in assembler-rv32im
  - Added escaped strings in Forth
  - Added dictionary tools

  - Contribution by Wolfgang Strauss:
      Interrupts on GD32VF103

31.10.2020, Matthias Koch, Mecrisp-Quintus 0.30 experimental:

  - Faster Mamihlapinatapai
  - Added "unused" to all cores
  - Added single step emulator for RV32IM and RV32IMC
  - Added curve tracer for GD32VF103CB

27.01.2021, Matthias Koch, Mecrisp-Quintus 0.31 experimental:

  - New target: Icestick with HX1K FPGA

  - Contribution by Bruno Levy:
      Femtosoc and the FemtoRV32 processor for HX1K

  - Contribution by Manfred Mahlow:
      Conditional compilation, Forth 200x style

12.02.2021, Matthias Koch, Mecrisp-Quintus 0.31a experimental:

  - Updated Femtosoc on HX1K
  - Improved Mamihlapinatapai

13.03.2021, Matthias Koch, Mecrisp-Quintus 0.32 experimental:

  - Improved acrobatics compiler
  - Added tinyblinky examples for HX8K
  - Fixed memory map for Icebreaker

21.03.2021, Matthias Koch, Mecrisp-Quintus 0.33 experimental:

  - Added muhsu for all RV32IM(C) targets
  - Added Mamihlapinatapai for M0
  - Improved FemtoRV32 on Icestick, now with rdcycle instruction

10.04.2021, Matthias Koch, Mecrisp-Quintus 0.33a experimental:

  - Further improved FemtoRV32 on Icestick
  - Added tinyblinky assembler example for Icestick

08.05.2021, Matthias Koch, Mecrisp-Quintus 0.34 experimental:

  - Further improved FemtoRV32 on Icestick
  - Added 2lshift 2rshift 2arshift to core
  - Added s>f and f>s to fixpt-math-lib.fs
  - Added vector graphics artwork for DAC on GD32VF103

06.06.2021, Matthias Koch, Mecrisp-Quintus 0.35 experimental:

  - New target: FemtoRV32 on Icebreaker
  - Switched both HiFive1 targets to compressed instruction set
  - Comparison primitives now inlined for speed
  - Common interrupt handler for all targets

03.07.2021, Matthias Koch, Mecrisp-Quintus 0.36 experimental:

  - FemtoRV32 on Icebreaker now supports compressed instructions
  - Fixed alignment of dictionary chain start constant
  - Fixed compressed immediate handling in disassembler-rv32imc

05.01.2022, Matthias Koch, Mecrisp-Quintus 0.37 experimental:

  - New target: ULX3S
  - Added SDRAM controller together with Icarus timing simulation
  - Paint on a 8x8 LED matrix demo for HX1K Icestick

14.09.2022, Matthias Koch, Mecrisp-Quintus 0.38 experimental:

  - Fixed misalignment bug in core that led to "Variables collide with dictionary" message

  - Full support for interrupts on MIPS
  - Fixed bug in create on MIPS targets
  - Improved PIC32MX270F256B target, added interrupt handling, and
    switched terminal to RPB13 (RX, pin 24) and RPB15 (TX, pin 26)
  - Added missing three register mul opcode to MIPS disassembler and quintusemu

  - Removed weird PIC32MX570 board that never got fully usable with FOSS tools

  - Contribution by Manfred Mahlow:
      Update of the VIS extension to 0.8.4.2

                     ____
                    /\   \
                   /  \___\
                  _\  / __/_
                 /\ \/_/\   \
                /  \__/  \___\
               _\  /  \  / __/_
              /\ \/___/\/_/\   \
             /  \___\    /  \___\
            _\  /   /_  _\__/ __/_
           /\ \/___/  \/\   \/\   \
          /  \___\ \___\ \___\ \___\
          \  /   / /   / /   / /   /
           \/___/\/___/\/___/\/___/  Veronica Karlsson

    We are very close to the 1.0.0 release now!


09.10.2022, Matthias Koch, Mecrisp-Quintus 1.0.0

  - Wrote glossary
  - Tidied up common verilog sources
  - Rewrote HX8K target to use FemtoRV32-Gracilis
  - Removed old PicoRV based Icebreaker port
  - Added binary with included acrobatics compiler for Icebreaker
  - Fixed alignment issues with inline cache access in acrobatics compiler

07.11.2022, Matthias Koch, Mecrisp-Quintus 1.0.1

  - New target: ULX3S-Pipeline, featuring FemtoRV32-Pegasus
    with single cycle instruction execution (except for div&rem)

  - Added firmware examples in assembler and C for the Icebreaker design
