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$40064000 constant MCG_C1
$40064001 constant MCG_C2
$40064002 constant MCG_C3
$40064003 constant MCG_C4
$40064004 constant MCG_C5
$40064005 constant MCG_C6
$40064006 constant MCG_S
$40064008 constant MCG_SC
$40065000 constant OSC_CR
$40048044 constant SIM_CLKDIV1
$40048048 constant SIM_CLKDIV2
$40048034 constant SIM_SCGC4
$40048004 constant SIM_SOPT2
: mcg-osc-ready? 2 MCG_S cbit@ ; 
: mcg-extref-refclock? $10 MCG_S cbit@ not ;
: mcg-extref-outclk? MCG_S c@ $0C and $8 = ;
: mcg-pll-lock? 64 MCG_S cbit@ ;
: mcg-pll-use-crystal? 32 MCG_S cbit@ ;
: MCG_96MHz ( -- ) 
10 OSC_CR c! 
$24 MCG_C2 c!
2 6 lshift 4 3 lshift + MCG_C1 C!
begin mcg-osc-ready? until 
begin mcg-extref-refclock? until
begin mcg-extref-outclk? until 
3 MCG_C5 c! 
1 6 lshift MCG_C6 c! 
begin mcg-pll-use-crystal? until
begin mcg-pll-lock? until 
$01030000 SIM_CLKDIV1 !
4 3 lshift MCG_C1 C! 
begin MCG_S c@ $0C and $0C = until 
;
$4006A000 constant UART0_BASE
$4006A015 constant UART0_RWFIFO
: UART_96MHz_115200 ( -- )
 0 UART0_BASE c!
 52 [ UART0_BASE 1 + literal, ] c!
 3 [ UART0_BASE $A + literal, ] c!
;
: USB_96MHz_48MHZ ( -- )
 2 SIM_CLKDIV2 !
 $510C0 SIM_SOPT2 !
;
: fullspeed 0 uart0_rwfifo c! MCG_96MHz UART_96MHz_115200 6 uart0_rwfifo c! ;
fullspeed
: init fullspeed CR ." Running at 96MHz" CR ;
init
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